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riscv64: assume fast unaligned access.

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We have a CTS test for this, so we may as well let the compiler take
advantage!

Test: treehugger
Change-Id: Icb6dc73be5e6da1155f39ca03245ae6b9d24dfb5
This commit is contained in:
Elliott Hughes
2023-08-30 09:37:06 -07:00
parent 4ac292ffd8
commit 4b350985eb
1 changed files with 6 additions and 0 deletions
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6
cc/config/riscv64_device.go
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@@ -27,6 +27,9 @@ var (
"-Werror=implicit-function-declaration",
"-fno-emulated-tls",
"-march=rv64gcv_zba_zbb_zbs",
// Equivalent to "-munaligned-access", but our clang doesn't have that yet.
"-Xclang -target-feature -Xclang +unaligned-scalar-mem",
"-Xclang -target-feature -Xclang +unaligned-vector-mem",
}
riscv64ArchVariantCflags = map[string][]string{}
@@ -34,6 +37,9 @@ var (
riscv64Ldflags = []string{
"-Wl,--hash-style=gnu",
"-march=rv64gcv_zba_zbb_zbs",
// Equivalent to "-munaligned-access", but our clang doesn't have that yet.
"-Xclang -target-feature -Xclang +unaligned-scalar-mem",
"-Xclang -target-feature -Xclang +unaligned-vector-mem",
}
riscv64Lldflags = append(riscv64Ldflags,