Merge "riscv64: enable V." into main

This commit is contained in:
Elliott Hughes
2023-09-12 17:57:50 +00:00
committed by Gerrit Code Review

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@@ -26,14 +26,14 @@ var (
// Help catch common 32/64-bit errors. // Help catch common 32/64-bit errors.
"-Werror=implicit-function-declaration", "-Werror=implicit-function-declaration",
"-fno-emulated-tls", "-fno-emulated-tls",
"-march=rv64gc_zba_zbb_zbs", "-march=rv64gcv_zba_zbb_zbs",
} }
riscv64ArchVariantCflags = map[string][]string{} riscv64ArchVariantCflags = map[string][]string{}
riscv64Ldflags = []string{ riscv64Ldflags = []string{
"-Wl,--hash-style=gnu", "-Wl,--hash-style=gnu",
"-march=rv64gc_zba_zbb_zbs", "-march=rv64gcv_zba_zbb_zbs",
} }
riscv64Lldflags = append(riscv64Ldflags, riscv64Lldflags = append(riscv64Ldflags,