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Mark the cortex-{a7,a53,a53.57} chips as supporting LPAE

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Port of Id3994c6d334c8bb673fc3849550f591136a8dd6a

Change-Id: Ic9d96ff81f9119e012f45e8e3b3a76961a922a21
This commit is contained in:
Dan Willemsen
2016-03-29 15:47:08 -07:00
parent 7b106e4e9f
commit 8e1e3fba87
1 changed files with 7 additions and 0 deletions
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7
cc/arm_device.go
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@@ -106,6 +106,11 @@ var (
armCpuVariantCflags = map[string][]string{ armCpuVariantCflags = map[string][]string{
"cortex-a7": []string{ "cortex-a7": []string{
"-mcpu=cortex-a7", "-mcpu=cortex-a7",
// Fake an ARM compiler flag as these processors support LPAE which GCC/clang
// don't advertise.
// TODO This is a hack and we need to add it for each processor that supports LPAE until some
// better solution comes around. See Bug 27340895
"-D__ARM_FEATURE_LPAE=1",
}, },
"cortex-a8": []string{ "cortex-a8": []string{
"-mcpu=cortex-a8", "-mcpu=cortex-a8",
@@ -114,6 +119,8 @@ var (
"-mcpu=cortex-a15", "-mcpu=cortex-a15",
// Fake an ARM compiler flag as these processors support LPAE which GCC/clang // Fake an ARM compiler flag as these processors support LPAE which GCC/clang
// don't advertise. // don't advertise.
// TODO This is a hack and we need to add it for each processor that supports LPAE until some
// better solution comes around. See Bug 27340895
"-D__ARM_FEATURE_LPAE=1", "-D__ARM_FEATURE_LPAE=1",
}, },
} }